1. Field of the Invention
The present invention relates to a semiconductor device comprising a plurality of blocks. More particularly, the invention relates to a semiconductor device comprising at least two blocks that are a memory means and a rectifier means for rectifying a defect in the memory means.
2. Description of the Related Art
One-chip semiconductor devices each comprising a plurality of blocks (also referred to as system LSIs) have been actively developed. Recently, higher integration of semiconductor devices as well as the manufacture of readable/writable memory means (also referred to as a memory or a RAM) is under development in accordance with the demand for further downsizing and higher performance of the devices. Such a memory means is required to have high capacity and reliability.
As a method for rectifying defects of a semiconductor device, there is the mainstream technique of replacing a defective memory cell with a redundant memory cell. Generally in such a technique, a fusion method is employed in which a fuse is blown by a laser.
There is known a method of translating an address which specifies a defective portion into an address of a redundant memory cell by using a memory means including a dielectric body (also referred to as an FRAM) (see Patent Document 1). There is known another method of inactivating a selection signal line in a defective portion by shifting selection signal lines of memory cells by using a memory means including a dielectric body (see Patent Document 2). Each of the methods in Patent Documents 1 and 2 is superior to the fusion method in that no expensive device is required for the fusion and thus a problem of area penalty which requires a larger mounting area in accordance with the manufacture of fusion can be addressed.                [Patent Document 1] Japanese Patent Laid-Open No. Hei 9-128991        [Patent Document 2] Japanese Patent Laid-Open No. 2003-51199        
As for the memory means including a dielectric body described in Patent Documents 1 and 2, complex sequence control is required. Specifically, it is required when powering ON the memory means that a potential of a wiring called a plate line is maintained constant in order to restore dielectric polarization. In addition, when powering OFF the memory means, it is required that a signal is transmitted to the plate line in order to hold the logic of the dielectric polarization.
In addition, in the methods described in Patent Documents 1 and 2, a memory means for storing an address of a defective memory cell is formed over the same substrate as a memory cell array, and an FRAM including a TFT and a capacitor having a ferroelectric thin film is used. When a ferroelectric film is used, the number of masks and additional steps, and manufacturing cost are inevitably increased.
In view of the foregoing problems, it is a feature of the invention to provide a semiconductor device which does not require complex sequence control. It is another feature of the invention to provide a semiconductor device which does not require additional steps nor high manufacturing cost. It is still another feature of the invention to provide a semiconductor device comprising a rectifier means for rectifying a defect with a simple method to achieve a high-capacity and reliable semiconductor device.